Why Stacking Chips Like Pancakes Could Mean a Huge Leap for Laptops (cnet.com) 46
For decades, you could test a computer chip's mettle by how small and tightly packed its electronic circuitry was. Now Intel believes another dimension is as big a deal: how artfully a group of such chips can be packaged into a single, more powerful processor. From a report: At the Hot Chips conference Monday, Intel Chief Executive Pat Gelsinger will shine a spotlight on the company's packaging prowess. It's a crucial element to two new processors: Meteor Lake, a next-generation Core processor family member that'll power PCs in 2023, and Ponte Vecchio, the brains of what's expected to be the world's fastest supercomputer, Aurora.
"Meteor Lake will be a huge technical innovation," thanks to how it packages, said Real World Tech analyst David Kanter. For decades, staying on the cutting edge of chip progress meant miniaturizing chip circuitry. Chipmakers make that circuitry with a process called photolithography, using patterns of light to etch tiny on-off switches called transistors onto silicon wafers. The smaller the transistors, the more designers can add for new features like accelerators for graphics or artificial intelligence chores. Now Intel believes building these chiplets into a package will bring the same processing power boost as the traditional photolithography technique.
"Meteor Lake will be a huge technical innovation," thanks to how it packages, said Real World Tech analyst David Kanter. For decades, staying on the cutting edge of chip progress meant miniaturizing chip circuitry. Chipmakers make that circuitry with a process called photolithography, using patterns of light to etch tiny on-off switches called transistors onto silicon wafers. The smaller the transistors, the more designers can add for new features like accelerators for graphics or artificial intelligence chores. Now Intel believes building these chiplets into a package will bring the same processing power boost as the traditional photolithography technique.
Wrong. (Score:1)
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Re:Wrong. (Score:5, Insightful)
Photolithography scales exponentially.
Photolithography scales quadratically. If you halve the feature size, you quadruple the density.
Stacking isn't a new idea. The problem is getting the heat out.
Keyboard backlight (Score:3)
The problem is getting the heat out.
That was my initial thought as well although perhaps the plan there is that if they can get it hot enough the glow can provide the keyboard backlight.
Easy solution. (Score:1)
Just put a chiller around the power cord to cool the electricity and your heat problems are no more.
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Photo lithography only scales exponentially if the newer version of lithography is exponentially smaller than the previous version.
Stacking can also be exponential as long as you stack previously stacked layers on top of each other.
As an example, start with stacking two single layers. Next stack two of those new 2 layer stacks. Then stack two of the new 4 layer stacks. Rinse and repeat.
my god (Score:5, Informative)
what a horrid summary, first we start off with pancakes, then "a package" then after a chunk of filler that has nothing to do with packaging, we get chiplets out of the blue but when squashed together in a package it will bring a power boost to the photolithographic versions?
what the ever holy hell are they trying to say? I intel going back to a monolithic single chip design? are they stacking in a 3d technique? Where the fuck are the pancakes, I want pancakes now!
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It doesn't seem like they're talking about pancakes, it seems like they're talking about standard multi-chip modules. When i was last involved in packaging 10 years ago, this was already a thing, but it wasn't necessarily the solution to all problems and its cost rarely justified its use. On the other side, we actually did have "pancakes" (chip-stack multi-chip modules) then too, but had some very limited use cases (usually cell phones).
I can't tell from tfa if Intel is doing something new, or if they're ju
Re:my god (Score:4)
what the ever holy hell are they trying to say?
(Marketing) "The FUCK does that matter anymore? You clicked on it, didn't you? That's what counts."
(Sales) "Uhhh, yeah...thanks for confirming just how fucking stupid the idea was, to separate us."
What about heat? (Score:3)
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It will require liquid cooling of some form. Maybe on-chip and in-package heat pipes to carry heat to the surface of the package, or maybe through-chip liquid cooling, possibly with an on-package closed loop. You really don't want users having to maintain coolant that passes through the die stack.
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Liquid cooling is so messy. Maybe they can build a Peltier cooler directly into the silicon?
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Though it is true that thermoelectic cooling is one of the least efficient cooling methods that we know of. For example if we compare it with something like thermal pumps that rely on gas compression. And it's also not a great heat transport mechanism when compared to simple vapor chambers/heat pipes and or some liquid cooling look, it does have one feature that those o
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None of that matters if you've got a strategy for dissipating that heat. All that really matters is what's reliable. Peltier coolers also only cause condensation because they get cold. If you don't run them hard enough for them to get that cold, then they won't cause condensation. A bigger problem is that they have limited lifespans. Also, three dimensional stacks means three dimensional heat. You need a strategy for removing heat from the inside of the stack, not only from the surface. You can put a peltie
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laptops use heat pipes too, but the big concern isn't so much how to get the heat away from the CPU (although that's a thing) but how to get it out of the CPU package...
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Peltier is often counterproductive (Score:2)
Peltier's main benefit is that it can actually cool something below ambient, but when you're looking to move a relatively large amount of heat*, from the engineering tests I've seen, the sheer inefficiency of Peltier elements means that they're often counterproductive, in that the heat they add from inefficiency means that your radiator needs to radiate 3X as much power, which means that it's going to have to be hotter. A hotter radiator means the peltier has to work harder...
So you end up with a processor
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It will require liquid cooling of some form.
Intel has already demonstrated two such chips. Not only do they not have liquid cooling, they are passively cooled to boot. The point here is not like some RaspberryPi kind of back to back chip soldered together. The point is construction such that there is no airgap between such chips and that the silicon substrates are in direct contact with each other.
Counterintuitively Intel's approach was to sandwich the hottest components between the other chips which aren't as affected by thermal limitations, effecti
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maybe the next generation of video game consoles will push/finance high performance 3D CPUs requiring a novel cooling solution as you've described.
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Microchannels using helium gas as a coolant? Very low surface tension coupled with high heat dissipation.
Microchannnels (Score:2)
Huh, I was thinking much of the same thing. You'd need to have them at a pretty high pressure though, and sealing the helium in permanently is quite a trick.
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In theory 3D stacking can help with heat. A lot of energy is wasted transmitting information between distant parts of the chip. Going to 3D can bring things closer together. That shortens the paths and saves energy.
Making it work out in practice can be hard, of course.
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Currently the Ryzen 5800x3d stacks cache memory above logic parts. Multiple reviewers have noted an increase in temperature at loads.
Multiple reviewers seem to have little understanding of how Zen3 works and plenty of reviewers have noted that the 5800x3d and the 5800x both actually hit the same thermal limits in the same benchmarks, while noting slight performance improvements in certain workloads for the latter.
Everything about chip design is a tradeoff one way or another. Modern CPUs are designed to thermally scale to a limit. So yay the 5800x3D hits 90C, so does the 5800x, so did it's equivalent Zen2 part. Thermals aren't relevant he
Already seen that episode (Score:2)
where Gordon Clark splits the motherboard and proposes stacking it like a pancake. They said that Intel won't do it.
Stacking = higher power consumption (Score:3)
You need a radiator from a 1970 Buick station wagon to cool the current Intel CPUs - WTF are we going to do with double the TDP?
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Where did you get double the TDP from? Intel's first demonstration for this did not only not require disassembling a car, it was passively cooled at 7W TDP.
laptops (Score:3)
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Laptops and desktops are different workloads with different limitations. A lot of people here are calling out thermal issues and I'm pointing out that they are incorrectly applying desktop thinking to what Intel has produced here, but now I'm going to reply with the opposite. Thermal issues will very much creep in at the desktop level. This technology (initially at least) will only scale on lower TDP parts.
It has great applications for a laptop, and no so much for a high end processor already thermally limi
Catch up with the times (Score:1)
From the closer-look department (Score:4, Informative)
Chipmakers make that circuitry with a process called photolithography, using patterns of light to etch tiny on-off switches called transistors onto silicon wafers.
Welcome to Slashdot. Ooo, oo, tell us again what a transistor is! Are they tiny on-off switches in silicon? Does each switch have its own tiny little gremlin to switch it or can each gremlin handle two switches at once, one with each hand?
Where Slashdot seems to be a little behind the curve, in reading these comments, is chip packaging. Yes, Intel is finally catching up to AMD. AMD has been using chiplets for years. Intel thought they could continue making monolithic chips and it would be fine, because they're Intel. They were wrong, so they've finally thrown in the towel and declared their intention to move to chiplets.
No, these are not multi-chip modules in the classic sense, with chips mounted on a circuit board like the old Pentium II cartridges. Chiplets are installed on a silicon interposer using the same technology used to make stacked NAND, but a much shallower stack (due to the heat dissipation problems discussed by others). Until the Ryzen x3d series mentioned by UnknowingFool, there were exactly two layers: the interposer (which is itself a chip from a wafer) and the chiplet being attached to it. One interposer, multiple chiplets attached across it, which for AMD were even made at different process nodes because using the older node for the I/O portion was cheaper. AMD is now trying to stack cache on top of logic in order to get cache physically closer to the logic while still using chiplets for logic (which are great for yield—only 4 or 8 cores at a time have to pass testing, not all 64 cores at once), but AMD hasn't solved the heat dissipation problems. No one has. AMD is just avoiding it with physical design and with throttling.
IBM has been attempting to make deep stacks of logic thermally viable for years now. It's extremely attractive. A little brick of logic the size and shape of a sugar-cube would do wonders for performance. The problem is getting the heat out of the center of the cube. (And every layer of the cube, of course.) IBM has experimented with a bunch of different fluids, and with processes for making capillaries through the chip that are so tiny they've had to deal with the molecules of the coolant getting stuck in them. They've published papers about bio-mimicry, attempting to imitate mammalian blood capillaries in silicon to get the required fluid pressure down to something reasonable. Last I heard the required pressure was still unreasonable.
This article is Intel finally admitting that AMD is smarter than they are. AMD has some patents on chiplets, so this should be interesting.
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Does each switch have its own tiny little gremlin to switch it or can each gremlin handle two switches at once, one with each hand?
Does the term Maxwell's Demon ring any bells?
So It's Come to This? (Score:3)
Chipmakers make that circuitry with a process called photolithography, using patterns of light to etch tiny on-off switches called transistors onto silicon wafers.
Jesus wept. Slashdot is nearing rock-bottom when phrases like this are creeping into summaries and articles.
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Well to be fair the modern Slashdotter struggles to breath with a facemask, think Fauci was part of a deep state conspiracy to drug everyone, and has trouble tying their shoelaces in the morning, on top of their demonstrated inability to communicate using words that make any kind of sense.
So yeah, this place hit rock bottom. ... Years ago. It just seems now they are catering to rock bottom as well.
What's the news (Score:2)
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Die stacking isn't new. It's been done for a long time.
Which is like saying the car wasn't new as people have been moving distances under assistance from a vehicle of other power sources for a long time.
If you think this die stacking is anything like the die stacking of the past then you've not looked into either approach in any great detail.
Hint: There's very real reasons why despite its benefit (including performance) it has taken this long to be implemented.
Also the article is a clusterfuck, better to reach out to Google and find a better source as to what i
Article was sponsored by IHOP (Score:2)
That's the: International House of Processors