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Intel Expands Core Concept for Chips

Posted by CowboyNeal on Sat Dec 18, 2004 09:31 AM
from the symmetrical-multithreading dept.
Aziabel writes "As most of you have probably heard, Intel plans to come out with chips containing two processing cores next year, but that's just the start. The Santa Clara, Calif.-based chip giant intends to exploit the concept of using multiple processor cores; chips with four cores and eight cores will eventually join dual-core chips, which will begin to appear from Intel next year. The company's research department is also looking at the feasibility of creating chips with hundreds of cores to assist servers and supercomputers with large numbers of relatively repetitive calculations, said Steve Smith, vice president of the desktop platforms group at Intel. The focus on multiple cores arises from Moore's Law, which dictates that the number of transistors on a chip doubles every two years. I say, the more the better. Keep 'em coming, chip-makers!"
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  • Can you imagine... (Score:2, Funny)

    ...a beowulf cluster on a chip!
  • Cell Processor (Score:5, Interesting)

    by News for nerds (448130) on Saturday December 18 2004, @09:38AM (#11124204)
    (http://zzz.zggg.com/)
    It's nothing more than a catch-up move to Sony/Toshiba/IBM Cell [sony.net], just like EMT64 to catch up AMD. Those late and awkward moves are of bad omen for Intel, IMO.
    • Re:Cell Processor (Score:5, Interesting)

      by skids (119237) on Saturday December 18 2004, @09:58AM (#11124270)
      (http://abrij.org/)
      Agreed. And in addition, really what they need to start doing is specializing the cores. Either that, or following the cell paradigm in reducing the complexity of each core to increase the number of cores, such that you can combine several into a special-function unit.

      But we all know that nothing really changes until memory access changes. Memory continues to be the bottleneck, so if the only thing a processor with more cores can do fast is crunch numbers, you'd get more bang for the buck with better/more vector processing units.

      Now, if/when they come out with memory that can be reorganized on-the-fly, perform large-scale simple massively-parrallel operations, and do some content-addressable tricks, that will be a signifigant development. I don't know how long it would take that to make it into higher level programming languages, though. It kinda of turns the job of writing programs on it's head.

      [ Parent ]
      • Re:Cell Processor by Psychofreak (Score:3) Saturday December 18 2004, @10:22AM
      • Re:Cell Processor by MrNemesis (Score:2) Saturday December 18 2004, @10:28AM
      • Re:Cell Processor (Score:4, Interesting)

        by lukasz (27763) on Saturday December 18 2004, @10:44AM (#11124401)
        >Now, if/when they come out with memory that can be reorganized on-the-fly, perform large-scale
        >simple massively-parrallel operations, and do some content-addressable tricks, that will be a
        >signifigant development. I don't know how long it would take that to make it into higher level
        >programming languages, though. It kinda of turns the job of writing programs on it's head.

        Have you ever stumbled on FPGAs ? It's already there. The problem is, as I see it, it does turn writing programs on it's head. Thus, very few people outside of the hardware design crowd know what to do with them.
        Just think how many people do get exposed to digital design vs programming. How many people do go beyond a vague idea of a processor working on data sitting in memory ? How many CS graduates are utterly unhappy about digital design classes ?

        [ Parent ]
      • Re:Cell Processor by getch(); (Score:2) Saturday December 18 2004, @10:49AM
    • Re:Cell Processor by jhains (Score:1) Saturday December 18 2004, @10:38AM
    • Rumor: another Intel catch-up move by museumpeace (Score:3) Saturday December 18 2004, @11:19AM
    • Re:Cell Processor by philthedrill (Score:2) Saturday December 18 2004, @11:54AM
    • Re:Cell Processor by News for nerds (Score:2) Saturday December 18 2004, @10:43AM
    • 5 replies beneath your current threshold.
  • I like (Score:1, Offtopic)

    by BCW2 (168187) on Saturday December 18 2004, @09:38AM (#11124206)
    (Last Journal: Monday September 25 2006, @07:02PM)
    The thought of playing Battlefield on a dual core Opteron. Actually, just having a dual core Opteron for any use has a serious drool factor.
    • Re:I like by bersl2 (Score:3) Saturday December 18 2004, @09:47AM
      • Re:I like by Clay Pigeon -TPF-VS- (Score:1) Saturday December 18 2004, @12:26PM
        • Re:I like by bersl2 (Score:2) Saturday December 18 2004, @05:00PM
    • 1 reply beneath your current threshold.
  • Long-term strategy of this? (Score:5, Insightful)

    by OccidentalSlashy (809265) on Saturday December 18 2004, @09:39AM (#11124208)
    I am beginning to suspect that Intel does things like this simply to make x86's instruction set harder and harder to emulate well.

    Kind of like to what I suspect Microsoft has been trying to do against Lindows for a while now, namely complicate their API more and more. And with IE and HTML.

    Of course they're well within their rights to try. We'll just build a better idiot savant. Or let Steve Jobs keep making Apples that no one can really imitate in the first place.
  • by Anonymous Coward on Saturday December 18 2004, @09:40AM (#11124215)
    This does not bode well for problems that mathmatically cannot be executed in parallel.
  • Great (Score:5, Funny)

    by Anonymous Coward on Saturday December 18 2004, @09:40AM (#11124216)
    Now I can do away with my furnace.
    • 1 reply beneath your current threshold.
  • Performance rateing (Score:5, Informative)

    by Barny (103770) <bakadamage-slashdot@yahoo.com> on Saturday December 18 2004, @09:40AM (#11124218)
    The problem is with what they (both intel and amd) plan to do is saying a dual core 1.5 centrino (for example) cpu is actually a 3Ghz machine (from the pr they have allready put out about these chips).

    Read overclockers.com for some good speculation on what the good/bad/ugly features are likely to be.
  • Not that kind of law! (Score:5, Insightful)

    by melonman (608440) on Saturday December 18 2004, @09:41AM (#11124221)
    (Last Journal: Saturday April 12 2003, @07:08AM)

    The focus on multiple cores arises from Moore's Law, which dictates that the number of transistors on a chip doubles every two years.

    I don't think non-compliance with Moore's Law is a felony. It's an observation, not a statute. Moore's Law arises from the fact that transistor counts keep doubling, not the other way around.

    Also, doubling the number of transistors in any way possible doesn't necessarily translate into double the power for any given application. In this case, multiple cores are good news for multi-threaded or forking server apps, but rather less interesting for a lot of desktop apps. Intel obviously has a vested interest in pushing ever larger die sizes, because it does large dies better than anyone else. Whether this will always be in the interests of the rest of the industry, let alone the end user, is less obvious.

  • hmm (Score:3, Interesting)

    if a kernel is written to take advantage of multiple cores, would this mean applications written ontop of it would start using the multiple cores?

    if not, how feasable is a multicore > single core emulation in linux.
    • Re:hmm by Ziviyr (Score:2) Saturday December 18 2004, @10:02AM
    • Re:hmm (Score:4, Informative)

      by jackb_guppy (204733) on Saturday December 18 2004, @10:13AM (#11124301)
      A core ~= A processor today. So multi-processor OS is nothing new. Shoot Intel Hyper-Threading is not new - It looks to OS as two processors but only 1 is running at given time.

      You see an OS runs multiple threads in the first place it just switches between them as each need run time.

      But for given program to be written to use 2 or more threads (looks to the OS as 2 or more programs) takes work.

      So take a program that is already written and place in a multi-core/processor/thread enviroment with all else being equal - it will run as fast as it did before.

      What will run faster is all of it. Take two of these old programs and run them in the multi-core/processor/thread enviroment and they each take same processing time unto themself, but the obversied time is shorter because they are both actually running at SAME time.

      [ Parent ]
      • Re:hmm by shawnce (Score:2) Saturday December 18 2004, @01:53PM
      • The Windows tax by tepples (Score:1) Saturday December 18 2004, @02:19PM
    • Multiple cores by IO ERROR (Score:2) Saturday December 18 2004, @10:22AM
    • Re:hmm by joe_plastic (Score:1) Saturday December 18 2004, @11:41PM
    • 1 reply beneath your current threshold.
  • Yeah, yeah. (Score:3, Insightful)

    by eddy (18759) on Saturday December 18 2004, @09:54AM (#11124255)
    (http://gazonk.org/~eloj/ | Last Journal: Tuesday June 07 2005, @01:18PM)

    &gtwill begin to appear from Intel next year.

    Very likely this is marketing sp33k for "will be paper-launched at the last day of next year"

  • HARD-core.. eh? (Score:2)

    by t_allardyce (48447) on Saturday December 18 2004, @09:54AM (#11124257)
    (Last Journal: Tuesday September 14 2004, @08:18PM)
    Supercomputers my ass, when will Intel admit that the real driving force behind faster hardware is lots of gibbing and blood splashing around the screen in real-time! This sounds like a very good idea and one that could maybe lead to a demise in separate graphics cards? your graphics could be handled on a separate core that gets its instructions from another core that maybe even separates collision detection and AI into other cores? I know purpose built hardware is always going to be faster at its job, but if this becomes much cheaper, it will just be more economical to ditch your graphics card and get more cores?
  • by Anonymous Coward on Saturday December 18 2004, @09:58AM (#11124267)
    Head of Intel: Today we announce our new 8 core processor, that's a nice addition to our 2 and 4 core processors released earlier this year.
    Officer of Law: you are under arrest for breaking the Moores Law, that allows you only double the number of transistors within a year.
  • by Anonymous Coward on Saturday December 18 2004, @10:01AM (#11124279)
    IBM have been doing this for years - and its biggest technological success story, the POWER5 chip shows that Intel are blatantly only playing catch-up with this announcement.

    http://www.theregister.co.uk/2004/11/26/ibm_power5 _moores_law/ [theregister.co.uk] shows this perfectly.

    It reminds me of the way that Intel pretended that they invented integrated wireless technology with its Centrino chip only after Apple had been shipping laptops for nearly two years with internal wireless cards.

    Normally, asking if they had no shame would be appropriate but it is unfortunately clear (without the need to ask) that they don't.
  • Dual cores for Intel next year? (Score:4, Interesting)

    by I_am_Rambi (536614) on Saturday December 18 2004, @10:12AM (#11124299)
    (http://slashdot.org/)
    Most of the reports that I have read have said that AMD will be releasing theirs next year and Intel the following year. Intel, though didn't start talking of dual cores until AMD started talking about theirs. From research that I have done, each manufactorer has some mighty issues to overcome with the single core before dual cores can be implemented nicely.

    AMD has said that dual cores will be clocked anywhere from 600Mhz to 1Ghz slower than the single core counterpart, namely because of heat issues. There are many more issues that arise with dual cores here are a few

    Cache correnance
    Bus contention
    software implementation
    plus more

    It will be interesting none the less on how each manufactorer overcomes the issues with multi-core chips and the benefits to the user of of multi-core.
    • Re:Dual cores for Intel next year? by norkakn (Score:1) Saturday December 18 2004, @10:22AM
    • Re:Dual cores for Intel next year? by SQL Error (Score:2) Saturday December 18 2004, @10:40AM
    • Re:Dual cores for Intel next year? (Score:4, Informative)

      by phoenix_rizzen (256998) on Saturday December 18 2004, @11:17AM (#11124539)
      Cache coherance, cache access, and bus contention are only problems for Intel. AMD solved most of these with the Athlon-MP and HyperTransport, and solved the reset with the Opteron's integrated memory controller.

      In AMD SMP systems, each CPU has its own separate link to RAM and peripherals. Each CPU also has a link to each other CPU. If CPU A needs something in CPU B's cache, it just asks CPU A to send it that data across the inter-CPU link.

      As you add CPUs in an Opteron server, you actually increase the RAM/system bandwidth. Compare that to a Xeon system where adding CPUs reduces the bandwidth available to each CPU (system/RAM bandwidth is constant).

      There's a beautiful set of articles over at Ars Technica describing the SMP abilities of the Athoon, the Opteron, and the Xeon. It's amazing Intel has been able to sell any 8-way systems.
      [ Parent ]
    • Re:Dual cores for Intel next year? by mapmaker (Score:2) Saturday December 18 2004, @09:20PM
  • OOH object oriented hardware (Score:2, Interesting)

    by lheal (86013) <lheal1999@yahoo. c o m> on Saturday December 18 2004, @10:15AM (#11124306)
    (http://sourcery.blogspot.com/ | Last Journal: Monday March 27 2006, @12:54AM)
    A few years ago I thought of a different kind of twist on computer architecture that I labelled OOH.

    The basic idea is that a computer could comprise many, many tiny CPUs, each with its own tiny local memory.

    A given (CPU+RAM) could be designated to operate as RAM for another CPU, so the MMU/OS could balance the number of processes needing memory with those needing processors.

    A (CPU+RAM) could also be labeled as a slave to others, so a multithreaded application could have the number of processors it needed.

    I haven't thought about it in a while, and it's been some time since I studied architecture, so probably these ideas are hopelessly naive.
  • So, how do ... (Score:1)

    by kclittle (625128) on Saturday December 18 2004, @10:17AM (#11124316)
    So, how will multi-core CPUs ala Intel stack up against the 'cell' architecture that IBM is about to release? I don't mean just the physical differences. Do they attempt to solve the same problem? Will I see cell-based Macs, or will the PPC go multi-core along the lines of the Intel design, leaving the cell tech for specialized applications like games?

  • by hazee (728152) on Saturday December 18 2004, @10:18AM (#11124317)
    Years ago (early 90s?) there was a lot of talk about "wafer computing", but it never seemed to come to anything. Maybe now we'll see it take off.

    When manufactufing chips, they're done so in wafers. Then the wafer is cut up into its component parts, and each part is sealed in its own case. It would seem to be more efficient to just stick the whole damn wafer in a single case.

    It would give a whole new meaning to "pizza box server", as the wafer and case would closely match the size of a pizza and box, respectively.
  • by superid (46543) on Saturday December 18 2004, @10:19AM (#11124320)
    (http://www.freesql.org/)
    According to Sun CEO Jonathan Schwartz [sun.com] they have 8 way chips already.
    • Yes they do (Score:4, Informative)

      by Groo Wanderer (180806) <charlieNO@SPAMstonearch.net> on Saturday December 18 2004, @10:31AM (#11124359)
      Yeah, it is called Niagara, and it is working silicon now, but far from done. expect an unveiling in February.

      If you want to know a bit more about it, I wrote it up a few weeks ago here:
      http://www.theinquirer.net/?article=19423

      -Charlie
      [ Parent ]
  • Sun already ships this (Score:2, Informative)

    by eclectus (209883) <.steve.dobbs. .at. .gmail.com.> on Saturday December 18 2004, @10:26AM (#11124341)
    (http://slashdot.org/)
    Sun's new Ultrasparc IV shipped in the SunFire 490's and larger servers already do this. The plans right now are to scale this up to 32 cores per cpu. The only issue that I see is that the memory controller is onboard the cpu, so while you may have 2/4/8/16/32 cores, you still only have a single memory controller, which limits the ammount of ram you can have. I'm sure they have a solution for this, but I don't know what it is.
  • -1 Troll (Score:1, Troll)

    by SunPin (596554) <slashspam&cyberista,com> on Saturday December 18 2004, @10:36AM (#11124373)
    (http://www.cyberista.com/)
    Keep em coming chip makers!

    WTF?

    /. should create a decent FAQ to teach their paying astroturf customers how to do it right.

  • by Groo Wanderer (180806) <charlieNO@SPAMstonearch.net> on Saturday December 18 2004, @10:38AM (#11124380)
    Intel just canned their 8-way chip and replaced it with a variant of Montecito, or more likely a Montvale derivative. Here is a bit on it:
    http://www.theinquirer.net/?article=20270
    ht tp://www.theinquirer.net/?article=20286
    Needless to say, their long term strategies are a tad up in the air right now.

    As for their desktop (IE P4 based) dual core plans, there are 2 generations planned. The first is a simple pairing of 2 current cores with a minimum of tweaks, basically a scared response to AMD. The second one is really the first one they planned, and it is a lot more sophisticated.

    AMD was there from long before Day One, and have the most coherent philosophy on dual cores for the desktop/server.

    Rather than re-write all my own articles here, here is a link where I break down all of Intel's dual core plans as well as some of AMDs.
    http://www.theinquirer.net/?article=17906

    Sorry for all the self links, but I don't really want to keep re-writing that stuff, links are the reason behind the web, right? :)

    -Charlie
  • GNU Hurd (Score:1)

    by Phoinix (666047) on Saturday December 18 2004, @10:38AM (#11124381)
    Does the expensive development of this provide a significant advantage over GNU Hurd [gnu.org] project (including Debian Hurd [debian.org])?

    Will this hardware development bring quantum computing [wikipedia.org] any closer to reality?

  • by MROD (101561) on Saturday December 18 2004, @10:44AM (#11124402)
    (http://www.lingula.org.uk/)
    Although for some, non-memory intensive, highly threaded applications multiple cores can be a boon, for many applications this won't be a boost in performance at all.

    Remember that each of these processing cores will have to share their memory bandwidth and possibly level 2 cache as well. As it is Intel's EM64T Xeon processors really feel the bandwidth bottleneck in their memory interface and can easily saturate it.

    I can see a dual core Xeon being able to saturate its memory bus on its own. Similarly, the dual core Opteron, unlike a dual processor Opteron, will have to share a single memory bus and hence be slower than a dual processor machine.

    Adding extra cores merely moves the computing bottleneck elsewhere, it's not a panacea.
    • Not a problem (Score:4, Interesting)

      by Groo Wanderer (180806) <charlieNO@SPAMstonearch.net> on Saturday December 18 2004, @11:53AM (#11124675)
      This is much less of a problem than you might thin, not because it isn't a real problem, but because it is so obvious. Everyone already has a workaround, most of which involve FB-DIMMs.

      Niagara (see my post above) is bandwidth rich, the AMD solutions are also. The only ones with a looming problem are Intel until CSI comes on in a few years, but that is manageable.

      Moral, Sun OK, AMD OK, Intel solid plan.

      -Charlie
      [ Parent ]
    • Also, cache performance will be less predictable by stereotype441 (Score:2) Saturday December 18 2004, @12:11PM
    • 1 reply beneath your current threshold.
  • Yer Laws (Score:4, Interesting)

    by Doc Ruby (173196) on Saturday December 18 2004, @10:45AM (#11124408)
    (http://slashdot.org/~Doc%20Ruby/journal | Last Journal: Thursday March 31 2005, @01:48PM)
    "Laws" like Moore's, Newton's, Ohm's and others, don't "dictate" anything. They "describe" observations. Intel doesn't meet integration targets based on some hoary old directive from Gordon Moore from the late 1960s. They meet production deadlines projected as close to their maximum productivity. Moore observed the logarithmic rate of transistor integration increase way back then, and described it as invariable as gravity.

    Engineers especially must understand that "laws" of nature, including human innovation, are governed by an "invisible hand". Not some imaginary deity, or some government, or some mythic genius. Rather, there is a deeper order to events, like the way every triangle has 180 degrees, the Sun "comes up" every morning, controversial Slashdot posts will get mod'ded "Troll", without any false statements or duplicity. We're engineers: our job is to engage the deeper order, understand it, model it, and exploit it, without further mystifying it.
    • Re:Yer Laws by iamatlas (Score:2) Saturday December 18 2004, @11:03AM
    • Re:Yer Laws by ScrewMaster (Score:2) Saturday December 18 2004, @01:36PM
      • PLEASE MOD UP by levl289 (Score:2) Saturday December 18 2004, @01:49PM
        • Moore's law by tepples (Score:2) Saturday December 18 2004, @02:40PM
          • Re:Moore's law by ScrewMaster (Score:2) Saturday December 18 2004, @03:34PM
            • Re:Moore's law by tepples (Score:1) Saturday December 18 2004, @04:20PM
  • by freelunch (258011) on Saturday December 18 2004, @10:57AM (#11124461)
    I know some are pointing to the Cell project as the inspiration here, but Tera was hard at work on this long ago in the form of the MTA [ucsd.edu]

    The MTA was a commercial failure. Tera's inability to execute as a company was a major reason.

    It is fun to watch Intel chase AMD.
  • by blair1q (305137) on Saturday December 18 2004, @10:57AM (#11124465)
    (Last Journal: Thursday October 17 2002, @10:28AM)
    Intel has been roadmapping this sort of thing for over 10 years. They got distracted by whoring to the Internet and AMD's 64-bit overreach.

    Besides, putting a math coprocessor alongside every integer unit was the beginning of multi-core CPUs.
  • I wanna see (Score:1)

    by Corellon Larethian (833606) on Saturday December 18 2004, @11:06AM (#11124498)
    Some big ass 200mm wafer for a processor. Like, they trim the crust off, slap a heat spreader on it, and send it to the mainboard manufacturer.

    That would be, like, totally awesome. You could play Doom3 and Half Life 2 at high quality.

    However, you could also convert the screener of "Doom" into xvid/mp3 within a few minutes. Which means it's available faster, which means there will be more niave bastards downloading the thing. Which means more psychiatric evaulations, and more medicine.

    *invests in Pfiser, GlaxoSmithKline, and Merck*
  • all bow to moore (Score:1)

    by mary_will_grow (466638) on Saturday December 18 2004, @11:13AM (#11124524)
    "The focus on multiple cores arises from Moore's Law, which dictates that the number of transistors on a chip doubles every two years."

    yeah its because of moore's law. you are such a frigging idiot.

  • by canuck57 (662392) on Saturday December 18 2004, @11:22AM (#11124560)

    Why wait? AMD has this now and it appears Intel is now following AMD in this direction.

    AMD Press Release [amd.com]

    • 1 reply beneath your current threshold.
  • by Nom du Keyboard (633989) on Saturday December 18 2004, @12:04PM (#11124739)
    I say, the more the better.

    Shouldn't that be, the Moore, the better?

  • Some software is licensed "per CPU" - the more CPUs you have, the more you pay.

    But what exactly IS a CPU from a software-licensing perspective?

    I anticipate a few court cases over this, particularly involving small- and medium-sized software vendors and anyone selling high-dollar software.

    Big players selling sub-$500/cpu software will hopefully be more interested in goodwill than greed and will offer the market reasonable pricing for these not-quite-multi-cpu computers.
  • Hitting the wall (Score:2)

    by SiliconEntity (448450) on Saturday December 18 2004, @12:20PM (#11124835)
    It's because they can't speed up the clock rate any more. Nobody wants to admit it so they switch over to multicores and try to distract you from the fact that it's the same clock as in your current computer. They're terrified that people are going to stop upgrading.
  • Core Limit (Score:2)

    by mrm677 (456727) on Saturday December 18 2004, @12:31PM (#11124904)
    The ultimate limit on the number of cores you can put on a single chip is the available pin bandwidth. At a point, there simply isn't enough bandwidth available to supply instructions and data.
  • by ScrewMaster (602015) on Saturday December 18 2004, @12:48PM (#11124979)
    can it play Duke Nukem Atomic Edition?
  • by thisisauniqueid (825395) on Saturday December 18 2004, @01:15PM (#11125128)
    Great. Just what we need. There are a lot of programmers that will try to take advantage of multiple cores, but very few programmers are able to write properly-threadsafe code. Bring on the bugs.
    • 1 reply beneath your current threshold.
  • by emarkp (67813) <(moc.oohay) (ta) (pkrame)> on Saturday December 18 2004, @02:18PM (#11125474)
    The focus on multiple cores arises from Moore's Law, which dictates that the number of transistors on a chip doubles every two years.
    That's every 18 months, not 2 years. It was even correct in TFA you dolt.
  • by doc modulo (568776) on Saturday December 18 2004, @04:31PM (#11126303)
    I read that some functional programming languages can automatically multithread a program so that the task is split up over multiple processors. The programmer would just program as for a single CPU and change nothing or very little.

    Functional programmming languages examples are Lisp and OCaml.

    Oh, correction, from a previous /. thread: [slashdot.org]

    OTOH, it is theoretically possible to automatically multithread purely functional programs, especially if they're lazy like Haskell. So it could end up being a very important language on multi-processor and distributed systems.

    The only way I see multi-core processors or cluster-like processors (Cell) succeed is if programmers switch to languages like that. Any other way would introduce too many bugs in programs. Computers should make life easier, not harder. Even for programmers.

    Eventually, multi-core/processor is the only way forward, long before single-processors have to heat up to supernova temperatures to increase speed.

    We're just at the beginning of computing. Looking back, programmers of the future will pity us poor folk who had to make do with only 1 CPU. However, we need the right tools to move forward. Anyone know if there's an automatically multithreading (functional) programming language in existance or being invented?
  • by PhotoGuy (189467) on Saturday December 18 2004, @07:21PM (#11127164)
    (http://slashdot.org/)
    Well, one of the first questions to cross my mind, was how to tie the multiple cores together. But if the VP of this endeavor is Steve Smith [pbs.org], maybe the answer is the "handyman's secret weapon..."

    -d

  • by koan (80826) on Saturday December 18 2004, @09:32PM (#11127738)
    (http://www.lostpacket.net/)
    Though the momentum of their girth will carry them a bit further they have been too slow to move.
  • by News for nerds (448130) on Saturday December 18 2004, @09:47AM (#11124234)
    (http://zzz.zggg.com/)
    Compiler can evolve to find places in code that can exploit parallelism.
    [ Parent ]
  • Re:Bottleneck. (Score:1)

    by faragon (789704) on Saturday December 18 2004, @10:44AM (#11124403)
    John Von Neumann's architecture was related to a single CPU and a single CPU-driven bus, and was warped in early 80's. In the x86 PC market, the Von Neumann approach was surpassed with the DMA controller in early 80's. Later, in 90's, MCA and PCI busses were introducing bus mastering "intelligent" cards which steals PCI-bus cycles for it's operating without CPU intervention, that was multiprocessing de facto.

    Today's multiple processor designs are far away from Von Neumann's designs, of course, but just by complex synchronization tricks: cache coherency, multiple syncronized buses, and some other beauty tricks.

    Corolarius: we want 64 or more processors on a die, with tons of busses and 0.01 micron 30 layer dies ;-)
    [ Parent ]
    • Re:Bottleneck. by lukasz (Score:1) Saturday December 18 2004, @12:49PM
      • Re:Bottleneck. by faragon (Score:1) Saturday December 18 2004, @02:28PM
    • Re:Bottleneck. by faragon (Score:1) Saturday December 18 2004, @02:26PM
      • 1 reply beneath your current threshold.
    • 1 reply beneath your current threshold.
  • by pmjordan (745016) on Saturday December 18 2004, @11:29AM (#11124585)
    (http://www-users.york.ac.uk/~pmj110/)
    Things will be moving away from this shortly. The XBox2 is rumoured to have more than one CPU. HyperThreading has been here for a while, dual-core chips are going to appear soon. Traditionally, the games industry has been one of the first to jump onto a performance bandwagon, and I don't anticipate a change in that. Developers will have to learn to write paralleliseable (multi-threaded) code sooner or later in order to be able to compete. Given enough time, this will be a non-issue.

    ~phil
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  • by MikeFM (12491) on Saturday December 18 2004, @05:41PM (#11126696)
    (http://kavlon.org/ | Last Journal: Friday March 21 2003, @02:10PM)
    In theory? Possibly. It'll make it so your computer can handle multiple threads better. Therefore it could speed up downloads a little under ehavy network load.
    [ Parent ]
  • Re:Bottleneck. (Score:2)

    by ChrisMaple (607946) on Saturday December 18 2004, @06:33PM (#11126942)
    Modern X86 processors are Harvard architecture, not von Neuman, to the cache. In other words, there are separate data and instruction caches.
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  • by ChrisMaple (607946) on Saturday December 18 2004, @07:06PM (#11127089)
    Where did dynamic RAM originate? Intel.
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